Fault-tolerant gates via homological product codes

I will present a method for the implementation of a universal set of fault-tolerant logical gates using homological product codes. In particular, I will show how one can fault-tolerantly map between different encoded representations of a given logical state, enabling the application of different classes of transversal gates belonging to the underlying quantum codes. This allows for the circumvention of no-go results pertaining to universal sets of transversal gates and provides a general scheme for fault-tolerant computation while keeping the stabilizer generators of the code sparse.

Event Type: 
Seminar
Scientific Area(s): 
Event Date: 
Wednesday, October 3, 2018 - 16:00 to 17:30
Location: 
Bob Room
Room #: 
405